Is Design Innovation Slowing?
The answer appears to be a resounding no, but innovation isn’t necessarily happening in the same places as in the past.
Paul Teich, principal analyst for Tirias Research, gave a provocative talk at the recent DAC conference entitled, “Is Integration Leaving Less Room for Design Innovation?” The answer isn’t as simple as the question might suggest.
“Integration used to be a driver for increasing the functionality of silicon,” Teich said. “Increasingly, it will be used to incorporate more features of an entire system on top of the hardware system.”
Teich talked about IP becoming complicated. He explained that the processes needed to produce optimal memory, or radio, or logic are becoming different enough that we are moving from system on chip (SoC) to system in package (SiP). “For SoCs, where you are integrating everything on the same die, access to IP is important. For SiPs what is important are partnerships and packaging technology. What we are seeing is a lot of innovation on the packaging front and a lot of folks trying partnerships so they have access to somebody else’s state-of-the-art known good die. Trying to integrate everything onto one die every time you turn the crank doing a system design is a losing proposition in terms of design engineering resources.”
After discussing some high-profile SiP products, he then looked at higher levels of systems and services built on top of hardware. “As we look at where the innovation is going, I don’t think it is going as much toward integrating onto a system on chip design as it is toward packaging individual chips, venting the heat, and making sure that you get a clean radio signal out of it. Everyone designing for the Internet of Things (IoT) has to remember that the ‘I’ in IoT means the product is not standalone. When you are making decisions about what to put in the product, you have some local decisions and you have the cloud behind you that provides access to a deeper context. Your competitive arena is that everyone is going back to the cloud to do data collection, analytics and draw some kind of pattern-level conclusion about the data you are gathering from your IoT sensor.”
So what does the rest of the industry think about this and where do they see innovation happening? Semiconductor Engineering talked with people from all aspects of hardware and systems design—and found a number of different places where innovation is still alive and well.
It is certainly true that the media concentrates on new markets and revenue streams, particularly those associated with the cloud. Services have become the money maker rather than products. But from a chip level, each of these markets requires customized or semi-customized hardware and software. And while integration is a key part of that, this is hardly cookie-cutter design.
“Today, it has moved from applications to things that can impact society,” said Lucio Lanza, managing director of Lanza techVentures. “We are in the middle of this change right now. For example, the new generation does not care about spending time walking around a mall. It’s a waste of time. They don’t need to meet people in the shopping mall. They can meet them on Facebook.”
Joe Costello talked about how Enlighted originally developed IoT edge devices in a DAC keynote. The company did this to learn about the market so it could move up the revenue chain. Today, it is selling services based on the platform it created. “You have to give up most of what you built during the first five years of your company. You have to turn the verticals into a set of horizontals to be able to attack the world and that is hard. That is how you scale.”
Lanza fully agrees with this. “I can see that once you have digitized the collection of data and you have the network, you are going to horizontalize things. Now you have platforms on which many things can be built and the next thing is to try and find out which verticals within that horizontal will move up and be successful.”
The notion of horizontals has changed over time. “There are many layers of software and then services on top of that,” added Dave Kelf, OneSpin Solutions. “Lower levels of software are becoming more like hardware. As it becomes a bigger problem, the lower-level blocks become commoditized and a service to the higher-level blocks. It is the highest-level that many associate with innovation.”
This cycle between building a vertical to test something out, generalize it into a horizontal, and then allowing new verticals to emerge from it is the heart of technology innovation. Integration and a progression of technology allow us to build bigger platforms and all of this feeds increasing amounts of innovation. The pace of technological innovation is not slowing.
But there may be a value disconnect. “If you are a hardware IP company and you come up with some clever IoT block, the only way to make money is to enable other people to create applications that take advantage of it,” Kelf said. “Any services created would generate money at the higher level. So you have problems with economies of scale and a lack of actual value in the hardware itself.”
Drew Wingard, CTO at Sonics, agrees. “Back in the days when hardware was thought to be king, the system companies still made a lot more money than the hardware companies. System companies added value by putting things around the hardware. The hardware guys have never had the kind of margins that the systems guys had.”
The system is what many people see as the horizontal platform, but even here there are huge choices to be made that have very wide ranging impacts. “An industry executive shared with me a recent study that showed that the best power efficiency and performance comes from a system with centralized processing and no processing at the edge,” said Graham Bell, Vice President of Marketing for Uniquify, Inc.. “Local processing at the edge requires its own software stack. By eliminating the software stacks at the edge and pulling all the input directly to the central processor, a more efficient closed system is possible. This approach is more application-specific, and therefore more customized for innovation to be realized.”
This is certainly not a view shared by many or some highly successful products in the market today. “Stop for a second and think,” said Lanza. “If we are talking about applying computers to more social aspects, more soft dimensions than just computer speed, very likely computers have to learn. In order to learn, does the CPU have to be faster? No way. Last time I checked on human beings, we don’t have a very fast computer for a brain.”
We may rely on centralized computing today, but that is just because we are waiting for new horizontals to be created that will put this capability into smaller devices, and this may not follow the paths we have used in the past. “We can’t rely on taking the same hardware designs and scaling them,” added Kelf. “We know that there are new ways to do things and we can no longer just keep building the same design. What we need to be thinking about are new hardware structures to solve difficult problems rather than just relying on performance.”
Is hardware getting further away from the system and services? “The higher the level of integration, the closer the silicon person gets to the boundary of the hardware system and the more they have had to worry about what the software is going to do with it,” said Wingard. “That means chip people are getting more like hardware system designers, but this doesn’t change the balance of power. It wasn’t the hardware system designer who had all of the power, it was the actual system company that decided what to do with it and what kind of software they needed, or applications they were going to run or services that they could sell. The number of layers between the services and the hardware is actually decreasing.”
New avenues of innovation
While Moore’s Law may be slowing down, this is unlikely to stop advancement and innovation in chip design. The threat of that slowdown initiated innovation in other areas such as packaging. “It is possible that the next evolution of system design will be in the area of substrate-based multi-chip systems, where some chips will be 10/7nm and others will remain at 26/16nm,” said Tom Wong, director of marketing, design IP at Cadence. “We have already seen mass adoption of POP (package-on-package) and low-cost 2.5Dinterposer as dictated by the form factor, performance and low-power needs of the smartphone. And in the datacenter and enterprise space, we see the adoption of very high-end 2.5D interposer technology, as well as 3D packaging in high-performance memory subsystems for networking applications.”
We are probably only just seeing the tip of the possibilities here. “In-package gives another dimension for including other system IP, such as MEMS, sensors, passive, RF and memory,” said Bell. “This solution can have lower cost and higher-efficiency versus forcing all the IP to be on-chip using a leading edge-process. Each IP can use the silicon process node ideal for its particular application. This kind of heterogeneous integration facilitates customization and innovation for a wide variety of possible applications.”
Innovation within the chip
There is plenty of room for innovation and differentiation within chips. “The SoC architecture, hardware/software partitioning, design methodology and packaging all offer avenues for innovation,” said Ravi Thummarukudy, CEO for Mobiveil. “Performance, Power and cost also provide great differentiation.”
In fact some see a new wave of innovation just beginning. “The semiconductor business has cycled through standard products (ASSP) and custom products (ASCP) as predicted by Makimoto’s Wave,” said Cadence’s Wong. “We have seen this recently as applications processors went from ‘standard solutions’ from SoC providers to ‘custom solutions’ from major consumer electronics device manufacturers. Innovation moves from merchant suppliers to OEMs as they build out their internal design teams. Some re-aggregation is happening as companies go vertical. This is just the beginning of yet another cycle.”
“If we build chips by assembling them from IP, does that get rid of hardware innovation?” asks Wingard. “I don’t think it does any more than the decision to build the digital parts out of primitives called standard cells instead of transistors. That did not destroy innovation. It just meant that you were able to work with higher-level building blocks. So an IP-based design approach allows the chip designer to make better system choices, to make better optimization because they do not have to spend as much time on the details.”
Designs today have a lot of interacting elements. “The availability of pre-verified subsystems allows the designer to focus their attention on the end application rather than spending lots of time just getting the basic infrastructure up and functional,” said Jim Bruister, president of SoC Solutions. “The innovation and differentiation is in the unique functions (custom IP) that make the end application useful, such as a special sensor, special radio, or even a special security algorithm.”
And there are several levels to the IP integration problem. “The process of selecting an IP requires that the ASIC integrator considers all of the system-related issues and challenges of hardware and software partitioning,” points out Elias Lozano, senior director of business development & IP solutions for Open-Silicon. “An IP cannot be looked at as a single piece of RTL or Hard IP block, but rather as a component addressing the challenges of the on/off-chip package, as well as in-chip challenges. How does this IP affect power , multiple voltage domains and new optimized clocking schemes? The challenge is not the IP, but rather the domain-expertise (human capital) that needs to understand all of these issues in order to propose a creative, cost-efficient solution for their application.”
“I never believed that by providing integration technology that I was removing people’s ability to innovate,” said Wingard. “I hope that I enhanced their ability to innovate by making it easier to put things together.”
And there is the cost factor. “The cost of developing a standard IP block is roughly 3-5X the cost of licensing it from a third party,” said Thummarukudy. “It just doesn’t make economic sense to make your own design blocks when a proven, mature block is available at 30% of the cost.”
And anyone who thinks that architecture doesn’t matter has a very short memory. “The first real apple design shocked the market because they quadrupled the area of the GPU versus CPU,” said Wingard. “This was a game changing move. The application processor had always been about 50sq mm because Nokia had said they wanted to spend X dollars on it and that is what you could afford to build for that much money. Apple built one that was 2.5X bigger. They made a different set of choices and the world never recovered.”
Innovation within blocks
There is room for innovation at the block level, too. “IP is at the bottom rung of that value chain, so I see more and more opportunities for innovation at the IP level as a result,” said Savage. “In addition, IP companies are offering services to their customers to customize IP to allow them to add some differentiation. Often this customization is driven by their customers (the systems companies).”
Even the most basic blocks are changing. “It is all about memory,” contends Lanza. “This is the fundamental unit. Connecting memories and their contents, quickly. That is the way our brains work and this needs to happen in computers. Memory technology is moving faster than any other technology.”
Standards keep evolving, as well. “The USB standard keeps evolving, and to optimize for cost you now have a single standard and single connector that can support multiple modes, such as displayport and HDM,I and muxes them efficiently in silicon,” said John Koeter, vice president of marketing for Synopsys’ Solutions Group. “That is just one example of innovation that continues with standards.”
“All design IP is not equal,” said Bell. “For instance, consider something like DDR interface IP. While there are many players in the market, only one has an innovative architecture covered by 16 patents. This gives the system better performance, smaller area, lower power and greater reliability.”
And there may be interesting ways in which a low-level block may be able to get in on the high-level revenue streams. “We have a product which is a hardware root of trust/security module,” adds Koeter. “It provides a secure hardware basis for booting your device and authenticating it onto the network. The secure trusted execution environment allows for over-the-air updates, so it can be upgraded securely. This enables having a secure area where you can offer user services, such as key provisioning or end-user services such as video streaming or mobile banking. We see a path through partnerships to be able to take a slice of not just every sale of the chip, but every transaction that happens through the chip.”
Tools, methodologies and flows
The tools necessary for innovation are also changing. “While still highly dependent on ‘chips,’ our industry is rapidly moving past the ‘chip centric’ era, where EDA was king, to a new era of system-centric design,” said Bob Smith, Executive Director of the ESD Alliance. “Expect to see more startups address the automation of system design by leveraging the increasing popularity of IP as the building blocks.”
IP integration has been hampered by the current verification flow. “Verification tools, such as those based on the emerging Portable Stimulus standard, streamline the IP assembly processes,” said Adnan Hamid, chief executive officer of Breker Verification Systems. “It helps with both the IP assembly problem and ensures that system-level functionality is verified in an efficient manner. Engineering teams can now spend more time with the innovative aspects of chip design.”
Technology plays two roles. New markets are created from existing technology foundations, and those platforms evolve over time. The hardware industry may not know what is being enabled. That was the case with the PC, the smart phone, and more recently with a communications infrastructure that connects sensor nodes that some call the IoT. The semiconductor industry created these platforms, even though new applications are sparse.
The second opportunity technology brings is that once a market has shown itself to exist and be robust enough, technology optimizes it to make it smaller, cheaper, and lower power. It feeds on the success of the market.
“There is a virtuous cycle between both of them,” said Wingard. “Sometimes the technology is truly enabling. The economics or the use model just doesn’t work until you get certain combinations of technology together and sufficiently optimized to enable the market.”
Added Wong: “In today’s complex systems, innovation can occur in the system, in software, in architecture, in hardware acceleration, or in packaging.”
We are only limited by our imagination.