The use of bottom terminated components (BTCs), such as quad-flat no-leads (QFNs), has become commonplace in the circuit board assembly world. This package offers several benefits including its small form factor, its excellent thermal and electrical performance, easy PCB trace routing, and reduced lead inductance. These components are generally attached to PWBs PCBs via solder paste. The design of these components with the large thermal pad, along with the tendency of solder paste to outgas during reflow from the volatiles in the flux, creates a difficult challenge in terms of voiding control within the solder joint. Voiding can have a serious effect on the performance of these components, including the mechanical properties of the joint as well as spot overheating. Solder preforms with a flux coating can be added to the solder paste to help reduce voiding. This study will focus on the benefits of utilizing solder preforms with modern flux coatings in conjunction with solder paste to help reduce voiding under QFNs, as well as the design and process parameters that provide optimal results.
Quad-flat no-lead (QFN) components and other types of bottom terminated components (BTCs) have become commonplace in modern electronics assembly. These types of packages are becoming more desirable for miniaturization in personal electronic devices such as mobile phones. However, the low standoff of these components from the PCB presents a challenge for surface mount assembly in terms of voiding on large thermal pads. Voiding on these thermal pads can lead to overheating of the component and, ultimately, failure of the component. This paper will discuss recent work that shows how to optimize a process in which solder preforms are utilized in conjunction with solder paste to increase solder volume and reduce voiding on QFN thermal pads.1
Halogen-containing materials have become more of a concern in the electronics industry as manufacturers strive to provide more environmentally-friendly products. This paper will also discuss the use of using a halogen-free flux coating versus a halogenated flux coating.
QFN voiding is a problem that has been faced by PCB manufacturers for years. QFNs have no leads, but have a thermal pad to conduct heat out of the integrated circuit (IC) in the QFN into the printed wire bond, as shown in Figure 1.
This design offers little to no standoff from the PCB, making it challenging for flux to outgas during reflow. Since solder paste is approximately 50% flux by volume, flux outgassing is abundant. Advances in flux formulations and powder particle size distribution have helped advance capabilities with solder paste, but some challenges still exist with certain components, such as the QFN package. Excessive voiding can inhibit heat transfer between the thermal pad on the QFN and PWB pad.
Determining void criteria
Manufacturers need to determine their own maximum allowable voiding percentage under QFNs for their assemblies, as there currently are no industry standards that give a maximum limit. While the IPC-A-610 standard does give voiding limits for ball grid array (BGA) type components, that specification does not apply to QFNs or other BTCs. Some manufacturers allow as much as 50% voiding under their QFNs, mostly due to an inability to achieve lower voiding with their existing solder materials. Figure 2 shows a common example of poor QFN voiding.
Modern solder materials
Solder material selection is an important consideration when setting up a process with QFNs. Solder paste technology has come a long way over the last several years, particularly in the realm of Pb-free, no-clean materials. Along with providing good voiding performance, solder pastes must be able to tackle issues, such as head-in-pillow (HIP) and non-wet opens. Halogen-free requirements are becoming more common as well, due to environmental considerations.
Solder preforms with flux coatings have been shown to reduce voiding under QFNs based on previous testing. However, even the flux coating technology has improved recently. It is imperative to have enough of a flux percentage on the preform to allow for good wetting, yet not have more than enough flux, which could contribute to voiding. New methods of flux application allow for depositing lower flux percentages on preforms than was previously feasible. In many cases, the flux percentage can be as low as 0.5%. Another important parameter with preform flux coatings is the uniformity and fitness of the coating. Imperfections in the flux coating can lead to either wetting or voiding issues. Figure 3 shows an example of a previous-generation flux coating next to a new- generation flux coating.
Electrical reliability is, of course, another primary factor for any no-clean flux. The particular next-generation flux coating used in our testing passes SIR testing in the unreflowed state.
Common methods of QFN void mitigation
Manufacturers have implemented several different stencil designs over the years in an effort to eliminate voiding under QFNs. Figure 5 shows some examples of stencil aperture patterns that have been utilized in order to allow for a path for flux to outgas during reflow:
Unfortunately, such patterns can become more problematic if too much solder volume is taken away, such as in the example shown in Figure 6.
This real-world example of a stencil aperture design equates to approximately 55% of the thermal pad being printed. This much aperture reduction will cause voiding, due to lack of solder volume.
Process considerations for implementing solder preforms
It is recommended that solder preforms be approximately half of the thickness of the printed solder paste. However, the preforms should be at least 0.0015″ thick in order to prevent bending while they are being placed. It is crucial that there is sufficient solder paste exposed around the perimeter of the solder preform so that the component will adhere to the board and not skew prior to reflow. For the same reason, it is imperative that the preform be placed far enough into the printed paste so that the paste is above the preform. Figure 7 shows a representative illustration of the stack-up for the QFN thermal pad:
With the enactment of RoHS and REACH regulations in recent years, halogen-containing compounds have been demonstrated as being environmentally unfriendly. Halogen-containing materials contain covalently bonded halides, which are any of the elements in Group 7 of the periodic table. These include chlorine (Cl), bromine (Br), fluorine (F), iodine (I), and astatine (At). To be halogen-free, the finished product must not contain any of these elements. Halogens are typically used as part of the activator package in the flux because they are especially effective at oxide removal. Traditionally, a lack of halogens in solder fluxes has had a negative impact on the performance of the material, as it has made them less effective at oxide removal. Therefore, to achieve equivalent wetting and coalescence, more activator is needed.4
Design of Experiment (DOE)
In this study, two different solder preform flux coatings were tested to see if the effect of a flux-coated preform in combination with solder paste would reduce the voiding under the thermal pad of a QFN. In addition, three different preform sizes were also tested to see what the optimal amount of solder would be to reduce voiding.
Equipment for the experiment
For this testing, we wanted to determine the optimal X/Y dimensions for solder preforms to provide the least amount of voiding. The stencil utilized for printing in this testing was also kept consistent, and had a 0.004″ thickness. We wanted to perform testing with what is often perceived in the industry as the “worst case scenario” in terms of the stencil aperture design, and, therefore, printed the entire thermal pad of the QFN with no windowpane design for flux outgassing.
A publicly available test board was utilized, which had twelve QFN locations per panel (see Figure 8). The board nish was ENIG, and the thermal pad dimensions were 0.33″ x 0.33″.
A Universal Fuzion pick and place machine was used for placing the preforms into the paste as well as on the QFN package.
Figure 9 shows the reflow profile utilized for this testing with a standard air environment (no nitrogen).
Materials for the Experiment
Two different preform flux coatings were tested in this experiment. Flux A was a no-clean, halogen-free (ROL0) flux applied at 0.5% by weight. Flux B was a no-clean, halogenated (ROL1) flux formulation which was applied at 0.5% by weight. The preforms tested were made with a SAC305 solder alloy for both flux coatings. This testing was designed to see if a halogen-free flux coated preform could perform equivalent to or better than a halogenated flux-coated preform.
In this testing, the solder preform size was varied to determine how much solder would be the most bene cial in regard to voiding. In keeping with the rule of thumb regarding solder preform thickness vs. the thickness of the solder paste being printed, the preform thickness was kept consistent for all samples at 0.002″ thick. Square preforms with three different X/Y dimensions were utilized for this testing:
1. 0.165″ x 0.165″ x 0.002″ (50% pad size)
2. 0.265″ x 0.265″ x 0.002″ (80% pad size)
3. 0.279″ x 0.279″ x 0.002″ (85% pad size)
We kept the solder paste consistent for the testing, and utilized a modern SMT no-clean, halogen-free, SAC305 material with a Type 4 powder mesh size.
Figure 10 shows a representative image of how the study was conducted by placing a preform (size 3, 85% of pad size) directly into the solder paste.
After analyzing the voiding data from the performed testing, the following test results were collected. The first graph (Figure 11) shows the total percent voiding over the entire thermal pad, whereas the second graph (Figure 12) shows the largest overall void for each preform size and flux type. The last graph (Figure 13) shows the average total number of voids in the entire thermal pad for each preform size and flux type as well.
From these results it can be determined that the size 2 preform (0.265″ x 0.265″ x 0.002″), which was 80% of the total PCB pad area, and the size 3 preform (0.279″ x 0.279″ x 0.002″), which was 85% of the total PCB pad area, are the optimal preform sizes in regards to total voiding. The sizes are also optimal in having the smallest overall voids for both flux A and B when compared to size 1 (0.165″ x 0.165″ x 0.002″), which was only 50% the total pad size. This shows that the larger solder volume applied by a flux-coated preform produced better overall results.
When comparing flux A to flux B, flux A was either comparable to flux B or it offered an improvement in void mitigation. This shows that the halogen-free flux coating can perform equivalent to or even better than a halogenated flux coating. Figure 14 shows an example of flux coating A with the size 2 preform. This resulted in 5.2% voiding, which is well below the 50% voiding the industry can potentially currently see.
While windowpane stencil designs are a common method of reducing voiding under QFNs, the lack of solder volume can actually negate the effects of the improved outgassing paths created by this design. Whether printing a full thermal pad or a windowpane design, the increased solder volume acquired by adding a flux-coated solder preform has been shown to improve results. The results of this testing show that the larger the percentage of the total pad size the preform is, the lower the overall voiding is, as well as the overall largest void. Also, contrary to the common belief that halogen-free fluxes provide inferior performance, the halogen-free flux coating produced comparable, or even better results, compared to the halogenated flux coating. The testing we performed showed the importance of choosing a preform with optimal dimensions relative to the pad size on the PCB. It also showed that the reduction of QFN voiding via preforms is possible while utilizing a halogen-free flux coating rather than a halogen-containing flux.
We would like to thank Universal Instruments for the use of their Advance Process Lab (APL) that helped with this testing.
1. Minimizing Voiding in QFN Packages Using Solder Preforms. Seth J. Homer and Ronald C. Lasky, PhD, PE, Indium Corporation.
2. Voiding Reduction in BottomTerminated Components (BTC) with Improved Flux Coating. Seth J. Homer and Ronald C. Lasky, PhD, PE, Indium Corporation.
3. The Effect ofThermal Pad Patterning on QFNVoiding. Derrick Herron, Dr.Yan Liu, and Dr. Ning-Cheng Lee, Indium Corporation.
4. Soldering Challenges in a Halogen-Free PCB Assembly Pro- cess.Timothy Jensen, Amanda Hartnett, and Ronald C. Lasky, PhD, PE, Indium Corporation.
BY BRANDON JUDD AND MARIA DURHAM, INDIUM CORPORATION