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    Getting the Gold Out: A Critical Requirement for High-Reliability Applications

    Getting the Gold Out A Critical Requirement for High-Reliability Applications

    Gold is a remarkable metal with many unique properties such as having good electrical conductivity and having generally high resistance to oxidation and corrosion. Because of this gold is commonly used in a variety of applications throughout electronics manufacturing as immersion gold over a copper base metal is highly resistant to the effects of corrosion. Since gold does not oxidize readily it provides a protective layer and a highly solderable surface that is very bondable for both gold and aluminum bonding wires within semiconductor devices.

    However, gold melts at a relatively low temperature and dissolves rapidly during the soldering process and the remaining gold within a solder joint can weaken the integrity of the interconnection. If the level of gold dissolution is excessive during the solder alloy’s liquidous phase formation, the composition and mechanical properties of the resulting solder joint will change and the inclusion of gold can result in gold embrittlement when gold is combined with other metals as the solder joint is formed.

    Gold Embrittlement

    Excessive remnant gold within a tin-lead (SnPb) solder joint resulting in gold embrittlement is a well-known failure mechanism. Lead-free solder alloys such as SAC305 are more capable of maintaining mechanical properties when combined with gold partially due to they’re higher tin content. However SAC305 solder joints will also degrade with increased gold content and independent studies have shown there does not appear to be a well-defined threshold between acceptable and unacceptable levels of gold within SAC305 solder joints therefore gold removal is generally recommended.

    The risk of gold embrittlement for a given board assembly depends upon a number of different factors including the amount of gold that will be leached from the surface area, the thickness of the gold plating, the volume of solder in the resulting joint, if the solder is from an immeasurable source such as wave or selective soldering, or from a measurable source such as reflowed solder paste. Gold contribution from the printed circuit board finish such as electroless nickel immersion gold (ENIG) or electroless nickel electroless palladium immersion gold (ENIPIG) can also play a contributing factor.

    Gold embrittlement can be a significant reliability issue and is a major concern for Class 3 high-reliability applications. The potential for gold embrittlement to occur increases when the weight of gold is greater than 5% as a ratio of the total solder joint by weight. Due to increasing miniaturization of electronics devices, and as the spacing between component leads and printed circuit board pads becomes less the absolute percentage of gold within the volume of a solder joint goes up. The gold in SnPb and SAC305 solder joints begins to negatively affect the solder joint at 5% weight of gold in the solder and as a result its removal is now a requirement of Rev F of IPC J-STD-001.

    Understanding J-STD-001 Rev F

    Gold removal, sometimes referred to as “gold washing”, if not performed prior to board level assembly, was previously considered to be a process indicator for Class 2 assemblies per J-STD-001 Rev E, and was classified as a defect for Class 3 assemblies. A major change with Rev F is that failure to perform gold removal is now considered to be a defect for BOTH Class 2 and Class 3 electronic products. Because of this change, J-STD-001 Rev F now affects many manufacturers of commercial electronics as well as the military/aerospace industry. This change to the J-STD-001 specs also affects contract electronics manufacturers (CEMs) and original equipment manufacturers (OEMs) building high-end Class 2 products that were previously using components with gold plating.

    The J-STD-001 Rev F requirements state that gold shall be removed:

    • From at least 95% of the surfaces to be soldered of through-hole component leads with 2.54μm (100 microinches) gold thickness and all through-hole leads that will be hand soldered regardless of gold thickness

    • From 95% of all surfaces to be soldered of surface mount components (SMT) regardless of gold thickness

    • From the surfaces to be soldered of solder terminals plated with 2.54μm (100 microinches) gold thickness and from all solder cup terminals regardless of gold thickness

    J-STD-001 Rev F further states that a double tinning process or dynamic solder wave may be used for gold removal prior to soldering the components into an assembly. Rev F also affirms that gold embrittled solder connections can occur regardless of gold thickness when solder volume is low or the soldering process dwell time is not sufficient to allow the gold to dissolve throughout the entire solder joint.

    Improper removal of gold from component leads and terminations prior to printed circuit board assembly can lead to solder cracks and/or field failures. Because of this, it is highly recommended that gold be completely removed so that the solder makes the electromechanical and metallurgical bond to the base metal beneath the gold, which in most cases is nickel or copper.

    Removal of Gold Plating

    It is commonly known that gold plating protects the device terminations through the harsh high-reliability qualification process however an excessive amount of gold in a solder joint can result in gold embrittlement. Pre-tinning removes this gold plating from component terminations as it is solubilized in the molten solder during the re-tinning process. With implementation of the new Rev F of IPC J-STD-001, gold removal and component re-tinning have become an essential process step for many high-reliability applications.

    The ideal method to facilitate the removal of gold plating from SMT and through-hole components is to use a hot solder dipping process. It is recommended that this re-tinning operation be carried out using a lead tinning machine or system utilizing controlled flux application, convection preheating, and dual dynamic solder pots with a built-in dross skimmer, nitrogen inerting as well as defined process control. A defined process of this type is highly recommended in lieu of manually dipping components into a static solder pot to reduce solder contamination, minimize non-wetting issues and enhance solderability.

    Dynamic solder pots are preferred over static solder pots and two solder pots are better than one since a scrubbing action is used in the first solder pot to remove the gold plating, oxidation or other residues. Nitrogen inerting helps the appearance of the resulting solder finish while mitigating icicles and dross buildup. Immersion of the component lead or termination into the flux should be controlled to allow the flux to flow up the lead or termination to a controlled depth. A defined withdrawal or extraction speed should be used in the second solder pot to control the re-tinning solder thickness and solder pots should be tested regularly for copper, nickel and other contaminants.

    It has been observed that several military and aerospace OEMs are still using single or static solder pots, or in some cases both a single, static solder pot for re-tinning. This is not a recommended practice since contaminants, flux buildup and accumulation of gold will be transferred to the re-tinned component leads or terminations. Many in the military/aerospace industry are still living in the 80s and rely on outdated standards and are unaware of the newer GEIA-STD-0006 re-tinning requirement.

    The ANSI/GEIA-STD-0006, Requirements for Using Solder Dip to Replace the Finish on Electronic Piece Parts, standard states that robotic solder dipping apparatus shall have:

    • Dynamic solder waves or other method which removes dross before solder dipping

    • Controlled dwell time in preheat and solder pot within ± 0.1 sec

    • Controlled depth of immersion to within ± 0.1mm

    • Controlled exit speed out of solder pot to within ± 0.3 cm/sec

    • Piece parts shall be preheated to less than 71⁰C prior to solder dipping

    • Total immersion time shall be less than 5 seconds per component side

    In order to achieve an intermetallic the component solderability should be tested before and after the re-tinning process using a wetting balance tester or meniscograph as well as pre-cleaning of any suspect components to remove organics and oxides before the re-tinning process. A flux should be used that is specific to the component lead or termination finish. As previously mentioned, a two solder pot system should be used with the first pot to “scrub” or remove unwanted plating and oxides, while the second pot is used to apply a pure solder alloy as the final coating. The solder immersion speed, depth of immersion, dwell time and extraction speed should be controlled to provide uniformity and process consistency.

    In choosing the proper flux for the component re-tinning process it should be noted that you do not need to use a rosin-based flux for the tinning process since rosin-based fluxes are generally specified for solderability testing only. A flux should be used that is specific to the termination finish, preferably using a water-based (low pH) flux if post-tinning cleaning is allowed, or a no-clean, alcohol-based flux can be used for components that cannot be exposed to post-tinning cleaning. In all cases the flux volume should be minimized immersing the component only deep enough to obtain a full coating on the termination without leaving any residue.

    For many through-hole and SMT components, especially plastic body components, touching the tips of the leads or terminations in solder for 5 seconds is sufficient without requiring preheating before solder dipping. However ceramic body, glass body or other thermally sensitive components must be preheated to reduce thermal shock before re-tinning. An infrared heat source is potentially dangerous and can damage some types of components while forced convection preheat is uniform and controllable.

    Component Supply Chain Trends

    Increasingly we are living in a lead-free world especially as it relates to the supply of active and passive electronic components. As the availability of RoHS complaint components increases the availability of components with a tin-lead termination finish inversely decreases. The changing trend in the supply chain of RoHS and tin-lead component is a major driver for the component re-tinning market. This change in the global tin-lead versus lead-free component trend can be seen below (Table 1).

    More common reliability issues such as shock, vibration and thermal cycling have shown that in most cases lead-free solder has been found to be at least as reliable as tin-lead. The exception being certain high-reliability, high-stress environments where many in our industry are still trying to understand the complete reliability issue. For example, a transition to lead-free solder raises issues with military and aerospace electronics manufacturers where a major concern is the formation of tin whiskers. The presence of lead even in a small amount of as low as 1 or 2% is the best way to mitigate tin whiskers.

    The reliance to utilize components with a tin-lead termination finish in high-reliability applications is one of the driving forces behind the global component re-tinning market, an estimated breakdown of which can be seen below (Table 2).

    The types of companies who are actively using component re-tinning includes defense, military and aerospace OEMs, medical and other high-reliability OEMs. In addition, CEMs doing defense, high-reliability work, as well as any company dealing with legacy components such as end-of-life builds are also actively engaged in component re-tinning.


    Solderability Test Methods

    In 1983 the Department of Defense (DoD) determined that over 40% of military electronics system field failures were electrical in nature and some 50% of these failures were due to poor solder connections. Plated finishes, usually nickel or tin, were found to be porous and non-intermetallic allowing oxide penetration to the base metal which led to poor solder joint integrity and therefore resulted infield failures. As a result the MIL-STD-883 solderability testing standard was instituted to assure that all components in high-reliability applications were indeed solderable and plated finishes gave way in favor of a hot solder dip finish which provides a fused SnPb homogeneous tin-lead finish.

    2An often asked question is what solderability testing is and what function does it perform. Solderability testing is not component preconditioning but is a measure of the ease with which a solder joint can be formed. Solderability testing is used to assess the solderability of device package terminations and varies depending on the type of solder alloy used. For example, when using lead-free alloys solderability can differ significantly from solderability when using lead-based alloys.

    The most common solderability test methods are the dip-and-look method and the wetting balance method. The dip-and-look method is a qualitative type test that is performed by comparative analysis while the wetting balance method is a quantitative type test based upon the interpretation of a wetting curve. There are several solderability test standards but the most common standards are MIL-STD-883 Method 2003, IPC J-STD-002 and MIL-STD-202 Method 208.

    Even though component re-tinning or preconditioning is not a solderability test, it is an ideal method for reworking component terminations that exhibit poor or degraded solderability which is most often caused by severe oxidation resulting from prolonged storage in a warehouse environment (Figure 1).

    While the wetting balance test method is precise and measures the wetting forces between molten solder and test specimen as a function of time it requires the interpretation of a wetting curve by skilled personnel. An advantage of the dip-and-look method is since it is subjective via comparative analysis it can be performed very quickly by shop floor personnel with minimal training (Figure 2).

    3In some high-reliability applications additional solderability testing may be required and can include steam aging which is used for accelerated life testing in order to simulate elongated storage conditions. In general it is recommended to have a solder thickness of at least 150 microinches as an ideal thickness to pass the steam age accelerated life testing simulating a 5 year shelf life. X-ray fluorescence (XRF) testing can be used to measure the solder thickness and composition of the re-tinned solder finish. Scanning electron microscope (SEM) analysis can be used to probe the intermetallic layer if required.

    There is somewhat of a misconception throughout much of the electronics industry of solderability testing versus component re-tinning. Solderability testing is designed to determine how well molten solder will wet on the solderable surfaces of electronic components with the most common categories being qualitative and quantitative testing. Component re-tinning is the process of dipping electronic component terminations into a bath of molten solder creates a “fresh” intermetallic layer with the base metal providing a highly solderable surface finish.

    Component Re-Tinning

    The motivation behind component re-tinning is improved reliability, removal of gold plating sometimes referred to as “gold washing” and tin whisker mitigation. In certain applications the formation of tin whiskers is a concern since whiskers can cause shorts and arcing caused by tin whisker growth that is predominantly outward from plated surfaces. An additional benefit of component re-tinning is that it results in enhanced solderability by producing a homogeneous intermetallic layer with the base metal of the component lead or termination.

    4Virtually all types of components can be re-tinned including through-hole (TH) components where the terminations are leaded and the leads protrude from the bottom of the device. Most forms of passive and active discrete surface mount (SMT) devices with terminations, and semiconductor devices including 2 or 4-sided flat packs (FP) or “J” leaded packages with fine-pitch lead centers can also be re-tinned.

    All leaded through-hole components can be tinned via the dip process. The basic solder dipping process for through-hole components consists of immersion in flux to a controlled depth, preheating to achieve flux activation, a controlled solder entrance speed, immersion in molten solder to a controlled depth, a controlled dwell in the molten solder to achieve an intermetallic bond, and a controlled extraction speed which is critical to regulating solder thickness. Solder temperature, flux chemistry and withdraw speed all have an effect on the solder thickness.

    Various types of SMT components including leadless chip carriers (LCC), plastic leadless chip carriers (PLCC), discrete chips and SOTs can be tinned via the drag process using a flat wave. Fixturing is critical since fixtures are required for automated re-tinning systems to ensure parallelism between the components and the molten solder. Formed multi-sided components including FPs and QFPs are very delicate and be easily damaged so they should be tinned via multi-axis articulated robotics using the side wave process (Figure 3).

    Since most QFPs are packaged in JEDEC trays a specially built machine has been developed to handle QFPs in a lights-out tray-to-tray process eliminating all manual handling. This system incorporates two dynamic nitrogen inerted solder pots, a dynamic flat wave fluxing station, forced convection preheating, aqueous wash and drying stations, plus a JEDEC tray stacker forming a complete work cell (Figure 4).

    A rotational vacuum pickup chuck with interchangeable tips picks QFPs from the JEDEC tray aided by a vision camera to ensure accurate alignment for individual component pickup. Top and bottom viewing cameras also perform post-solder inspection of re-tinned QFPs to detect any potential solder bridges.

    5Component Refurbishing

    Reconditioning of legacy components is often required since legacy components may be decades old and stored in uncontrolled conditions which means they are generally oxidized with un-solderable component leads that will result in poor solderability and solder joint failures during board assembly. The need to solder dip these legacy components is essential to replace oxidized, plated finishes that are deemed un-solderable and replace the finish with an intermetallic homogeneous finish that is impervious to further oxide growth.

    The need to convert a component from a SnPb finish to a lead-free finish can also be accomplished by component reconditioning as well as RoHS conversion whereby a component can be converted from a RoHS finish to a SnPb finish for high-reliability applications (Figure 5).

    Fine-pitch QFPs as small as 6mm x 6mm and as large as 50mm x 50mm can be re-tinned and fine-pitch QFPs with a lead pitch down to 0.3mm (0.012”) can be successfully re-tinned with bridge free results (Figure 6).

    In all cases whether reconditioning legacy components or converting a RoHS finish component to a SnPb finish, the benefits of mitigating potential tin whisker growth as well as the removal of gold in preparation for high-reliability soldering will result in improved solderability and enhanced end product quality.


    QFN Coplanarity

    When re-tinning bottom terminated components such as QFNs and DFNs the surface tension of the molten solder can form a bulbous nodule on the large the larger the pad the thicker this solder bump becomes adversely affecting coplanarity during board assembly. If the bottom of a QFN is not perfectly flat this will cause issues during the reflow soldering process and will likely result in opens between the QFN terminations and the printed circuit board pads and potentially voids in the solder joints.

    7QFN coplanarity can be controlled by the use of a custom solder nozzle specifically designed for QFNs in combination with the use of a hot nitrogen blow off nozzle resulting in world-class coplanarity within 0.075mm (0.003”) for the majority of leadless devices (Figure 7).

    Bottom terminated components such as QFNs and DFNs as small as 3mm x 3mm and a lead pitch as small as 0.5mm can be successfully re-tinned with this technique.


    Solderability is no longer an option for many high-reliability segments of the world’s electronics assembly industry. With implementation of the latest Rev F of J-STD-001, solderability testing, gold removal and component re-tinning have become prerequisites for doing business and remaining competitive in the global marketplace.