Toshiba Corporation developed the first 3D flash memory with the TSV technology in the world

Toshiba Memory Corporation , the world leader in storage solutions, today announced the development of the first [1] three-dimensional flash memory in the world (3D) BiCS FLASH ™ [2] using the technology through Silicon via (TSV) [3] with the technology of three bits per cell (triple cell level, triple-level cell, TLC). Shipments of prototype development purposes began in June and samples of products should be available in the second half of 2017. The prototype of this revolutionary device will be on display from 7 to 10 August as part of the 2017 Flash Memory Summit Santa Clara, California, USA.

“Toshiba develops the first NAND Flash stacked to 16 square features the TSV technology”

Devices manufactured using the TSV technology comprise vias and vertical electrodes which cross microcircuits silicon to provide connections, an architecture which carries an input and an output of data at high speed, while reducing energy consumption . The performance in real situations has been proven previously with the introduction of 2D NAND flash memory from Toshiba [4] .

Combining 3D flash process to 48 layers and the TSV technology, Toshiba Memory Corporation was able to increase the bandwidth programming of the product while reducing energy consumption. Energy efficiency [5] one box is about twice [6] that of the FLASH ™ BiCS same generation made using wire bonding technology. TSV BiCS FLASH ™ also provides a device of 1 terabyte (TB) having a stacked architecture 16 square in a single housing.

Memory Toshiba Corporation will market BiCS FLASH ™ with TSV technology to provide an ideal solution for storage applications that require low latency, high bandwidth and high IOPS [7] / watt, including high-end enterprise SSD .

General specifications (prototype)

Enclosure Type NAND double x8 BGA-152
Storage capacity 512 Go 1 To
Number of batteries 8 16
external dimension Width 14 mm 14 mm
Depth 18 mm 18 mm
Height 1,35 mm 1,85 mm
Interface Bascule DDR
Max. Interface 1066 Mbits/s

[1] Source: Toshiba Memory Corporation on July 11, 2017.
[2] A structure stacking flash memory cells vertically on a silicon substrate to achieve significant density improvement over the planar NAND flash memory wherein the cells are formed on the silicon substrate.
[3] Through Silicon Via: technology in which vias and vertical electrodes crossing the square silicon for connection in a single housing.
[4] “Toshiba develops the first NAND Flash stacked to 16 square features the TSV technology” -20150806-1.html
[5] The data transfer rate per unit power. (MB / s / W)
[6] Compared to current Memory Toshiba Corporation.
[7] Input Output Per Second: Number of inputs and data outputs for processing via a port I / O per second. A higher value indicates better performance.

The communiqué from a translation should in no way be considered official. The only version of faith that makes is that the statement in its original language. The translation must always be confronted with the source text, which will set a precedent.


Toshiba Memory Corporation
Kota Yamaji, +81-3-3457-3473
Division de planification d’entreprise

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